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MRF89XA
SYNC Control Register (SYNCREG) .......................... 44
SYNC Value First Byte
Configuration Register (SYNCV32REG)............. 47
SYNC Value Fourth Byte
Configuration Register (SYNCV07REG)............. 48
SYNC Value Second Byte
Configuration Register (SYNCV23REG)............. 47
SYNC Value Third Byte
Configuration Register (SYNCV15REG)............. 48
Transmit Parameter Configuration Register
TXCONREG) ...................................................... 49
Revision History ................................................................ 133
S
Serial Peripheral Interface (SPI) ......................................... 23
SPI Config ........................................................................... 24
SPI Data.............................................................................. 25
SPI Interface Overview and Host Microcontroller
Connections ................................................................ 23
Suggested PA Biasing and Matching.................................. 15
Super-Heterodyne Architecture........................................... 11
Supported Feature Blocks
64-Byte Transmit and Receive FIFO Buffer ................ 11
Bit Synchronization ..................................................... 11
Data Filtering and Whitening....................................... 11
General Configuration Registers................................. 11
Supported frequency bands .................................................. 7
Switching Times and Procedures
Optimized Receive Cycle .......................................... 108
Optimized Transmit Cycle ......................................... 109
Receiver Frequency Hop Optimized Cycle............... 111
RX → TX and TX → RX Jump Cycles...................... 112
Transmitter Frequency Hop Optimized Cycle........... 110
T
Transmitter Architecture ..................................................... 19
Transmitter Description....................................................... 19
Typical Performance Characteristics
Adjacent Channel Rejection ..................................... 118
Current Stability Over Temperature and Voltage...... 127
Digital Modulation Schemes ..................................... 127
FSK Spectrum in Europe .......................................... 125
OOK Channel Bandwidth.......................................... 123
Output Power Flatness ............................................. 119
P OUT Stability over Temperature and Voltage.......... 121
Sensitivity Flatness ................................................... 113
Sensitivity Stability over Temperature and Voltage .. 116
Sensitivity vs. Bit Rate .............................................. 117
Sensitivity vs. LO Drift............................................... 114
Sensitivity vs. Receiver BW ...................................... 115
Transmitter Spectral Purity ....................................... 122
V
Voltage Controlled Oscillator .............................................. 17
W
Write Bytes Sequence ........................................................ 25
Write Register Sequence.................................................... 24
WWW Address ................................................................. 135
WWW, On-Line Support ....................................................... 5
DS70622C-page 138
Preliminary
? 2010–2011 Microchip Technology Inc.
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